periph_conf.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2017 Inria
3  * Copyright (C) 2015 Freie Universität Berlin
4  * Copyright (C) 2015 Hamburg University of Applied Sciences
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
23 #ifndef PERIPH_CONF_H
24 #define PERIPH_CONF_H
25 
26 /* This board provides an LSE */
27 #ifndef CONFIG_BOARD_HAS_LSE
28 #define CONFIG_BOARD_HAS_LSE 1
29 #endif
30 
31 /* This board provides an HSE */
32 #ifndef CONFIG_BOARD_HAS_HSE
33 #define CONFIG_BOARD_HAS_HSE 1
34 #endif
35 
36 #include "periph_cpu.h"
37 #include "clk_conf.h"
38 #include "cfg_timer_tim2.h"
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
54 static const adc_conf_t adc_config[] = {
55  { .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 1 }, /* ADC_IN1, fast */
56  { .pin = GPIO_PIN(PORT_A, 1), .dev = 0, .chan = 2 }, /* ADC_IN2, fast */
57  { .pin = GPIO_PIN(PORT_A, 4), .dev = 0, .chan = 5 }, /* ADC_IN5, fast */
58  { .pin = GPIO_PIN(PORT_B, 0), .dev = 0, .chan = 11 }, /* ADC_IN11, slow */
59  { .pin = GPIO_PIN(PORT_C, 1), .dev = 0, .chan = 7 }, /* ADC_IN7, slow */
60  { .pin = GPIO_PIN(PORT_C, 0), .dev = 0, .chan = 6 }, /* ADC_IN6, slow */
61 };
62 
63 #define ADC_NUMOF ARRAY_SIZE(adc_config)
64 
70 static const uart_conf_t uart_config[] = {
71  {
72  .dev = USART2,
73  .rcc_mask = RCC_APB1ENR_USART2EN,
74  .rx_pin = GPIO_PIN(PORT_A, 3),
75  .tx_pin = GPIO_PIN(PORT_A, 2),
76  .rx_af = GPIO_AF7,
77  .tx_af = GPIO_AF7,
78  .bus = APB1,
79  .irqn = USART2_IRQn
80  },
81  {
82  .dev = USART1,
83  .rcc_mask = RCC_APB2ENR_USART1EN,
84  .rx_pin = GPIO_PIN(PORT_A, 10),
85  .tx_pin = GPIO_PIN(PORT_A, 9),
86  .rx_af = GPIO_AF7,
87  .tx_af = GPIO_AF7,
88  .bus = APB2,
89  .irqn = USART1_IRQn
90  },
91  {
92  .dev = USART3,
93  .rcc_mask = RCC_APB1ENR_USART3EN,
94  .rx_pin = GPIO_PIN(PORT_C, 11),
95  .tx_pin = GPIO_PIN(PORT_C, 10),
96  .rx_af = GPIO_AF7,
97  .tx_af = GPIO_AF7,
98  .bus = APB1,
99  .irqn = USART3_IRQn
100  }
101 };
102 
103 #define UART_0_ISR (isr_usart2)
104 #define UART_1_ISR (isr_usart1)
105 #define UART_2_ISR (isr_usart3)
106 
107 #define UART_NUMOF ARRAY_SIZE(uart_config)
108 
114 static const pwm_conf_t pwm_config[] = {
115  {
116  .dev = TIM16,
117  .rcc_mask = RCC_APB2ENR_TIM16EN,
118  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
119  { .pin = GPIO_UNDEF, .cc_chan = 0 },
120  { .pin = GPIO_UNDEF, .cc_chan = 0 },
121  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
122  .af = GPIO_AF1,
123  .bus = APB2
124  }
125 };
126 
127 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
128 
134 static const spi_conf_t spi_config[] = {
135  {
136  .dev = SPI2,
137  .mosi_pin = GPIO_PIN(PORT_B, 15),
138  .miso_pin = GPIO_PIN(PORT_B, 14),
139  .sclk_pin = GPIO_PIN(PORT_B, 13),
140  .cs_pin = GPIO_PIN(PORT_B, 12),
141  .mosi_af = GPIO_AF5,
142  .miso_af = GPIO_AF5,
143  .sclk_af = GPIO_AF5,
144  .cs_af = GPIO_AF5,
145  .rccmask = RCC_APB1ENR_SPI2EN,
146  .apbbus = APB1
147  }
148 };
149 
150 #define SPI_NUMOF ARRAY_SIZE(spi_config)
151 
157 static const i2c_conf_t i2c_config[] = {
158  {
159  .dev = I2C1,
160  .speed = I2C_SPEED_NORMAL,
161  .scl_pin = GPIO_PIN(PORT_B, 8),
162  .sda_pin = GPIO_PIN(PORT_B, 9),
163  .scl_af = GPIO_AF4,
164  .sda_af = GPIO_AF4,
165  .bus = APB1,
166  .rcc_mask = RCC_APB1ENR_I2C1EN,
167  .rcc_sw_mask = RCC_CFGR3_I2C1SW,
168  .irqn = I2C1_ER_IRQn
169  },
170  {
171  .dev = I2C3,
172  .speed = I2C_SPEED_NORMAL,
173  .scl_pin = GPIO_PIN(PORT_A, 8),
174  .sda_pin = GPIO_PIN(PORT_A, 5),
175  .scl_af = GPIO_AF5,
176  .sda_af = GPIO_AF8,
177  .bus = APB1,
178  .rcc_mask = RCC_APB1ENR_I2C3EN,
179  .rcc_sw_mask = RCC_CFGR3_I2C3SW,
180  .irqn = I2C3_ER_IRQn
181  }
182 };
183 
184 #define I2C_0_ISR isr_i2c1_er
185 #define I2C_1_ISR isr_i2c3_er
186 
187 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
188 
190 #ifdef __cplusplus
191 }
192 #endif
193 
194 #endif /* PERIPH_CONF_H */
195 
GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
pwm_conf_t::dev
mini_timer_t * dev
Timer used.
Definition: periph_cpu_common.h:154
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
adc_conf_t::pin
gpio_t pin
pin to use
Definition: periph_cpu.h:343
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
GPIO_AF1
@ GPIO_AF1
use alternate function 1
Definition: periph_cpu_common.h:87
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
adc_conf_t
ADC device configuration.
Definition: periph_cpu.h:74
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
cfg_timer_tim2.h
Common configuration for STM32 Timer peripheral based on TIM2.
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176