periph_conf.h
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1 /*
2  * Copyright (C) 2015 Freie Universität Berlin
3  * Copyright (C) 2015 Hamburg University of Applied Sciences
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 /* This board provides an LSE */
25 #ifndef CONFIG_BOARD_HAS_LSE
26 #define CONFIG_BOARD_HAS_LSE 1
27 #endif
28 
29 /* This board provides an HSE */
30 #ifndef CONFIG_BOARD_HAS_HSE
31 #define CONFIG_BOARD_HAS_HSE 1
32 #endif
33 
34 #include "periph_cpu.h"
35 #include "clk_conf.h"
36 #include "cfg_timer_tim2.h"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
52 static const adc_conf_t adc_config[] = {
53  { .pin = GPIO_PIN(PORT_A, 0), .dev = 0, .chan = 1 }, /* ADC1_IN1, fast */
54  { .pin = GPIO_PIN(PORT_A, 1), .dev = 0, .chan = 2 }, /* ADC1_IN2, fast */
55  { .pin = GPIO_PIN(PORT_A, 4), .dev = 1, .chan = 1 }, /* ADC2_IN1, fast */
56  { .pin = GPIO_PIN(PORT_B, 0), .dev = 2, .chan = 12 }, /* ADC3_IN12, slow */
57  { .pin = GPIO_PIN(PORT_C, 1), .dev = 1, .chan = 7 }, /* ADC12_IN7, slow */
58  { .pin = GPIO_PIN(PORT_C, 0), .dev = 1, .chan = 6 }, /* ADC12_IN6, slow */
59 };
60 
61 #define ADC_NUMOF ARRAY_SIZE(adc_config)
62 
68 static const uart_conf_t uart_config[] = {
69  {
70  .dev = USART2,
71  .rcc_mask = RCC_APB1ENR_USART2EN,
72  .rx_pin = GPIO_PIN(PORT_A, 3),
73  .tx_pin = GPIO_PIN(PORT_A, 2),
74  .rx_af = GPIO_AF7,
75  .tx_af = GPIO_AF7,
76  .bus = APB1,
77  .irqn = USART2_IRQn
78  },
79  {
80  .dev = USART1,
81  .rcc_mask = RCC_APB2ENR_USART1EN,
82  .rx_pin = GPIO_PIN(PORT_A, 10),
83  .tx_pin = GPIO_PIN(PORT_A, 9),
84  .rx_af = GPIO_AF7,
85  .tx_af = GPIO_AF7,
86  .bus = APB2,
87  .irqn = USART1_IRQn
88  },
89  {
90  .dev = USART3,
91  .rcc_mask = RCC_APB1ENR_USART3EN,
92  .rx_pin = GPIO_PIN(PORT_B, 11),
93  .tx_pin = GPIO_PIN(PORT_B, 10),
94  .rx_af = GPIO_AF7,
95  .tx_af = GPIO_AF7,
96  .bus = APB1,
97  .irqn = USART3_IRQn
98  }
99 };
100 
101 #define UART_0_ISR (isr_usart2)
102 #define UART_1_ISR (isr_usart1)
103 #define UART_2_ISR (isr_usart3)
104 
105 #define UART_NUMOF ARRAY_SIZE(uart_config)
106 
112 static const pwm_conf_t pwm_config[] = {
113  {
114  .dev = TIM3,
115  .rcc_mask = RCC_APB1ENR_TIM3EN,
116  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
117  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
118  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
119  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
120  .af = GPIO_AF2,
121  .bus = APB1
122  }
123 };
124 
125 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
126 
132 static const spi_conf_t spi_config[] = {
133  {
134  .dev = SPI1,
135  .mosi_pin = GPIO_PIN(PORT_A, 7),
136  .miso_pin = GPIO_PIN(PORT_A, 6),
137  .sclk_pin = GPIO_PIN(PORT_A, 5),
138  .cs_pin = GPIO_PIN(PORT_A, 4),
139  .mosi_af = GPIO_AF5,
140  .miso_af = GPIO_AF5,
141  .sclk_af = GPIO_AF5,
142  .cs_af = GPIO_AF5,
143  .rccmask = RCC_APB2ENR_SPI1EN,
144  .apbbus = APB2
145  },
146  {
147  .dev = SPI2,
148  .mosi_pin = GPIO_PIN(PORT_B, 15),
149  .miso_pin = GPIO_PIN(PORT_B, 14),
150  .sclk_pin = GPIO_PIN(PORT_B, 13),
151  .cs_pin = GPIO_PIN(PORT_B, 12),
152  .mosi_af = GPIO_AF5,
153  .miso_af = GPIO_AF5,
154  .sclk_af = GPIO_AF5,
155  .cs_af = GPIO_AF5,
156  .rccmask = RCC_APB1ENR_SPI2EN,
157  .apbbus = APB1
158  },
159  {
160  .dev = SPI3,
161  .mosi_pin = GPIO_PIN(PORT_C, 12),
162  .miso_pin = GPIO_PIN(PORT_C, 11),
163  .sclk_pin = GPIO_PIN(PORT_C, 10),
164  .cs_pin = GPIO_UNDEF,
165  .mosi_af = GPIO_AF6,
166  .miso_af = GPIO_AF6,
167  .sclk_af = GPIO_AF6,
168  .cs_af = GPIO_AF6,
169  .rccmask = RCC_APB1ENR_SPI3EN,
170  .apbbus = APB1
171  }
172 };
173 
174 #define SPI_NUMOF ARRAY_SIZE(spi_config)
175 
181 static const i2c_conf_t i2c_config[] = {
182  {
183  .dev = I2C1,
184  .speed = I2C_SPEED_NORMAL,
185  .scl_pin = GPIO_PIN(PORT_B, 8),
186  .sda_pin = GPIO_PIN(PORT_B, 9),
187  .scl_af = GPIO_AF4,
188  .sda_af = GPIO_AF4,
189  .bus = APB1,
190  .rcc_mask = RCC_APB1ENR_I2C1EN,
191  .rcc_sw_mask = RCC_CFGR3_I2C1SW,
192  .irqn = I2C1_ER_IRQn
193  },
194  {
195  .dev = I2C3,
196  .speed = I2C_SPEED_NORMAL,
197  .scl_pin = GPIO_PIN(PORT_A, 8),
198  .sda_pin = GPIO_PIN(PORT_A, 5),
199  .scl_af = GPIO_AF5,
200  .sda_af = GPIO_AF8,
201  .bus = APB1,
202  .rcc_mask = RCC_APB1ENR_I2C3EN,
203  .rcc_sw_mask = RCC_CFGR3_I2C3SW,
204  .irqn = I2C3_ER_IRQn
205  }
206 };
207 
208 #define I2C_0_ISR isr_i2c1_er
209 #define I2C_1_ISR isr_i2c3_er
210 
211 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
212 
214 #ifdef __cplusplus
215 }
216 #endif
217 
218 #endif /* PERIPH_CONF_H */
219 
GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
pwm_conf_t::dev
mini_timer_t * dev
Timer used.
Definition: periph_cpu_common.h:154
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
adc_conf_t::pin
gpio_t pin
pin to use
Definition: periph_cpu.h:343
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
adc_conf_t
ADC device configuration.
Definition: periph_cpu.h:74
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
GPIO_AF6
@ GPIO_AF6
use alternate function 6
Definition: periph_cpu_common.h:92
GPIO_AF2
@ GPIO_AF2
use alternate function 2
Definition: periph_cpu_common.h:88
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
cfg_timer_tim2.h
Common configuration for STM32 Timer peripheral based on TIM2.
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176