periph_conf.h
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1 /*
2  * Copyright (C) 2020 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* Add specific clock configuration (HSE, LSE) for this board here */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 /* This board provides a 24MHz HSE oscillator */
27 #ifndef CONFIG_BOARD_HAS_HSE
28 #define CONFIG_BOARD_HAS_HSE 1
29 #endif
30 /* By default, configure a 80MHz SYSCLK with PLL using HSE as input clock */
31 #ifndef CONFIG_CLOCK_PLL_M
32 #define CONFIG_CLOCK_PLL_M (6)
33 #endif
34 
35 #include "periph_cpu.h"
36 #include "clk_conf.h"
37 #include "cfg_i2c1_pb8_pb9.h"
38 #include "cfg_rtt_default.h"
39 #include "cfg_timer_tim5.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
49 static const uart_conf_t uart_config[] = {
50  {
51  .dev = LPUART1,
52  .rcc_mask = RCC_APB1ENR2_LPUART1EN,
53  .rx_pin = GPIO_PIN(PORT_A, 3),
54  .tx_pin = GPIO_PIN(PORT_A, 2),
55  .rx_af = GPIO_AF12,
56  .tx_af = GPIO_AF12,
57  .bus = APB12,
58  .irqn = LPUART1_IRQn,
59  .type = STM32_LPUART,
60  .clk_src = 0, /* Use APB clock */
61  },
62  { /* Connected to Arduino D0/D1 */
63  .dev = USART1,
64  .rcc_mask = RCC_APB2ENR_USART1EN,
65  .rx_pin = GPIO_PIN(PORT_C, 5),
66  .tx_pin = GPIO_PIN(PORT_C, 4),
67  .rx_af = GPIO_AF7,
68  .tx_af = GPIO_AF7,
69  .bus = APB2,
70  .irqn = USART1_IRQn,
71  .type = STM32_USART,
72  .clk_src = 0, /* Use APB clock */
73  },
74 };
75 
76 #define UART_0_ISR (isr_lpuart1)
77 #define UART_1_ISR (isr_usart1)
78 
79 #define UART_NUMOF ARRAY_SIZE(uart_config)
80 
86 static const spi_conf_t spi_config[] = {
87  {
88  .dev = SPI1,
89  .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
90  .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
91  .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
92  .cs_pin = GPIO_UNDEF,
93  .mosi_af = GPIO_AF5,
94  .miso_af = GPIO_AF5,
95  .sclk_af = GPIO_AF5,
96  .cs_af = GPIO_AF5,
97  .rccmask = RCC_APB2ENR_SPI1EN,
98  .apbbus = APB2,
99  },
100 };
101 
102 #define SPI_NUMOF ARRAY_SIZE(spi_config)
103 
105 #ifdef __cplusplus
106 }
107 #endif
108 
109 #endif /* PERIPH_CONF_H */
110 
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
GPIO_AF12
@ GPIO_AF12
use alternate function 12
Definition: periph_cpu_common.h:98
cfg_timer_tim5.h
Common configuration for STM32 Timer peripheral based on TIM5.
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
STM32_USART
@ STM32_USART
STM32 USART module type.
Definition: periph_cpu.h:583
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
STM32_LPUART
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: periph_cpu.h:584
cfg_i2c1_pb8_pb9.h
Common configuration for STM32 I2C.
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273