periph_conf.h
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1 /*
2  * Copyright (C) 2019 Inria
3  * 2019 Freie Universität Berln
4  * 2019 Kaspar Schleiser <kaspar@schleiser.de>
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 /* This board provides an LSE */
25 #ifndef CONFIG_BOARD_HAS_LSE
26 #define CONFIG_BOARD_HAS_LSE 1
27 #endif
28 
29 /* This board provides an HSE */
30 #ifndef CONFIG_BOARD_HAS_HSE
31 #define CONFIG_BOARD_HAS_HSE 1
32 #endif
33 
34 /* The HSE provides a 12MHz clock */
35 #define CLOCK_HSE MHZ(12)
36 
37 #include "periph_cpu.h"
38 #include "clk_conf.h"
39 #include "cfg_usb_otg_fs.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
49 static const dma_conf_t dma_config[] = {
50  { .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
51  { .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
52 };
53 
54 #define DMA_0_ISR isr_dma2_stream3
55 #define DMA_1_ISR isr_dma2_stream2
56 
57 #define DMA_NUMOF ARRAY_SIZE(dma_config)
58 
64 static const timer_conf_t timer_config[] = {
65  {
66  .dev = TIM5,
67  .max = 0xffffffff,
68  .rcc_mask = RCC_APB1ENR_TIM5EN,
69  .bus = APB1,
70  .irqn = TIM5_IRQn
71  }
72 };
73 
74 #define TIMER_0_ISR isr_tim5
75 
76 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
77 
83 static const uart_conf_t uart_config[] = {
84  {
85  .dev = USART1,
86  .rcc_mask = RCC_APB2ENR_USART1EN,
87  .rx_pin = GPIO_PIN(PORT_B, 7),
88  .tx_pin = GPIO_PIN(PORT_B, 6),
89  .rx_af = GPIO_AF7,
90  .tx_af = GPIO_AF7,
91  .bus = APB2,
92  .irqn = USART1_IRQn,
93 #ifdef MODULE_PERIPH_DMA
94  .dma = DMA_STREAM_UNDEF,
95  .dma_chan = UINT8_MAX,
96 #endif
97  },
98 };
99 
100 #define UART_0_ISR (isr_usart1)
101 
102 #define UART_NUMOF ARRAY_SIZE(uart_config)
103 
109 static const spi_conf_t spi_config[] = {
110  {
111  .dev = SPI1,
112  .mosi_pin = GPIO_PIN(PORT_A, 7),
113  .miso_pin = GPIO_PIN(PORT_A, 6),
114  .sclk_pin = GPIO_PIN(PORT_A, 5),
115  .cs_pin = GPIO_UNDEF,
116  .mosi_af = GPIO_AF5,
117  .miso_af = GPIO_AF5,
118  .sclk_af = GPIO_AF5,
119  .cs_af = GPIO_AF5,
120  .rccmask = RCC_APB2ENR_SPI1EN,
121  .apbbus = APB2,
122 #ifdef MODULE_PERIPH_DMA
123  .tx_dma = 0,
124  .tx_dma_chan = 3,
125  .rx_dma = 1,
126  .rx_dma_chan = 3,
127 #endif
128  }
129 };
130 
131 #define SPI_NUMOF ARRAY_SIZE(spi_config)
132 
138 static const i2c_conf_t i2c_config[] = {
139  {
140  .dev = I2C2,
141  .speed = I2C_SPEED_NORMAL,
142  .scl_pin = GPIO_PIN(PORT_B, 10),
143  .sda_pin = GPIO_PIN(PORT_B, 11),
144  .scl_af = GPIO_AF4,
145  .sda_af = GPIO_AF4,
146  .bus = APB1,
147  .rcc_mask = RCC_APB1ENR_I2C2EN,
148  .clk = CLOCK_APB1,
149  .irqn = I2C2_ER_IRQn,
150  },
151 };
152 
153 #define I2C_0_ISR isr_i2c2_er
154 
155 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
156 
158 #ifdef __cplusplus
159 }
160 #endif
161 
162 #endif /* PERIPH_CONF_H */
163 
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
dma_conf_t::stream
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: periph_cpu.h:443
cfg_usb_otg_fs.h
Common configuration for STM32 OTG FS peripheral.
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
dma_conf_t
DMA configuration.
Definition: periph_cpu.h:420
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176