periph_conf.h
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1 /*
2  * Copyright (C) 2018 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 #include "clk_conf.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 static const timer_conf_t timer_config[] = {
34  {
35  .dev = TIM2,
36  .max = 0x0000ffff,
37  .rcc_mask = RCC_APB1ENR_TIM2EN,
38  .bus = APB1,
39  .irqn = TIM2_IRQn
40  }
41 };
42 
43 #define TIMER_0_ISR isr_tim2
44 
45 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
46 
52 static const uart_conf_t uart_config[] = {
53  {
54  .dev = USART1,
55  .rcc_mask = RCC_APB2ENR_USART1EN,
56  .rx_pin = GPIO_PIN(PORT_A, 10),
57  .tx_pin = GPIO_PIN(PORT_A, 9),
58  .rx_af = GPIO_AF4,
59  .tx_af = GPIO_AF4,
60  .bus = APB2,
61  .irqn = USART1_IRQn,
62  .type = STM32_USART,
63  .clk_src = 0, /* Use APB clock */
64  }
65 };
66 
67 #define UART_0_ISR (isr_usart1)
68 
69 #define UART_NUMOF ARRAY_SIZE(uart_config)
70 
76 static const spi_conf_t spi_config[] = {
77  {
78  .dev = SPI1,
79  .mosi_pin = GPIO_PIN(PORT_B, 5),
80  .miso_pin = GPIO_PIN(PORT_B, 4),
81  .sclk_pin = GPIO_PIN(PORT_B, 3),
82  .cs_pin = GPIO_UNDEF,
83  .mosi_af = GPIO_AF0,
84  .miso_af = GPIO_AF0,
85  .sclk_af = GPIO_AF0,
86  .cs_af = GPIO_AF0,
87  .rccmask = RCC_APB2ENR_SPI1EN,
88  .apbbus = APB2
89  },
90  {
91  .dev = SPI2,
92  .mosi_pin = GPIO_PIN(PORT_B, 15),
93  .miso_pin = GPIO_PIN(PORT_B, 14),
94  .sclk_pin = GPIO_PIN(PORT_B, 13),
95  .cs_pin = GPIO_PIN(PORT_B, 12),
96  .mosi_af = GPIO_AF0,
97  .miso_af = GPIO_AF0,
98  .sclk_af = GPIO_AF0,
99  .cs_af = GPIO_AF0,
100  .rccmask = RCC_APB1ENR_SPI2EN,
101  .apbbus = APB1
102  },
103 };
104 
105 #define SPI_NUMOF ARRAY_SIZE(spi_config)
106 
108 #ifdef __cplusplus
109 }
110 #endif
111 
112 #endif /* PERIPH_CONF_H */
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
STM32_USART
@ STM32_USART
STM32 USART module type.
Definition: periph_cpu.h:583
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
GPIO_AF0
@ GPIO_AF0
use alternate function 0
Definition: periph_cpu_common.h:86
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176