periph_conf.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2018 OTA keys S.A.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* This board provides an LSE */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 /* This board provides an HSE */
28 #ifndef CONFIG_BOARD_HAS_HSE
29 #define CONFIG_BOARD_HAS_HSE 1
30 #endif
31 
32 /* The HSE provides a 12MHz clock */
33 #define CLOCK_HSE MHZ(12)
34 
35 #include "periph_cpu.h"
36 #include "clk_conf.h"
37 #include "cfg_timer_tim5.h"
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
47 static const dma_conf_t dma_config[] = {
48  { .stream = 9 }, /* DMA2 Stream 1 - SPI4_TX */
49  { .stream = 8 }, /* DMA2 Stream 0 - SPI4_RX */
50 };
51 
52 #define DMA_0_ISR isr_dma2_stream1
53 #define DMA_1_ISR isr_dma2_stream0
54 
55 #define DMA_NUMOF ARRAY_SIZE(dma_config)
56 
62 static const uart_conf_t uart_config[] = {
63  {
64  .dev = USART1,
65  .rcc_mask = RCC_APB2ENR_USART1EN,
66  .rx_pin = GPIO_PIN(PORT_A, 10),
67  .tx_pin = GPIO_PIN(PORT_A, 9),
68  .rx_af = GPIO_AF7,
69  .tx_af = GPIO_AF7,
70  .bus = APB2,
71  .irqn = USART1_IRQn,
72 #ifdef MODULE_PERIPH_UART_HW_FC
73  .cts_pin = GPIO_UNDEF,
74  .rts_pin = GPIO_UNDEF,
75  .cts_af = GPIO_AF7,
76  .rts_af = GPIO_AF7,
77 #endif
78 #ifdef MODULE_PERIPH_DMA
79  .dma = DMA_STREAM_UNDEF,
80  .dma_chan = UINT8_MAX,
81 #endif
82  },
83  { /* Modem UART */
84  .dev = USART2,
85  .rcc_mask = RCC_APB1ENR_USART2EN,
86  .rx_pin = GPIO_PIN(PORT_D, 6),
87  .tx_pin = GPIO_PIN(PORT_D, 5),
88  .rx_af = GPIO_AF7,
89  .tx_af = GPIO_AF7,
90  .bus = APB1,
91  .irqn = USART2_IRQn,
92 #ifdef MODULE_PERIPH_UART_HW_FC
93  .cts_pin = GPIO_PIN(PORT_D, 3),
94  .rts_pin = GPIO_PIN(PORT_D, 4),
95  .cts_af = GPIO_AF7,
96  .rts_af = GPIO_AF7,
97 #endif
98 #ifdef MODULE_PERIPH_DMA
99  .dma = DMA_STREAM_UNDEF,
100  .dma_chan = UINT8_MAX,
101 #endif
102  },
103  { /* GPS UART */
104  .dev = USART6,
105  .rcc_mask = RCC_APB2ENR_USART6EN,
106  .rx_pin = GPIO_PIN(PORT_C, 7),
107  .tx_pin = GPIO_PIN(PORT_C, 6),
108  .rx_af = GPIO_AF8,
109  .tx_af = GPIO_AF8,
110  .bus = APB2,
111  .irqn = USART6_IRQn,
112 #ifdef MODULE_PERIPH_UART_HW_FC
113  .cts_pin = GPIO_UNDEF,
114  .rts_pin = GPIO_UNDEF,
115  .cts_af = GPIO_AF8,
116  .rts_af = GPIO_AF8,
117 #endif
118 #ifdef MODULE_PERIPH_DMA
119  .dma = DMA_STREAM_UNDEF,
120  .dma_chan = UINT8_MAX,
121 #endif
122  },
123  { /* Arduino Port UART */
124  .dev = USART3,
125  .rcc_mask = RCC_APB1ENR_USART3EN,
126  .rx_pin = GPIO_PIN(PORT_D, 9),
127  .tx_pin = GPIO_PIN(PORT_D, 8),
128  .rx_af = GPIO_AF7,
129  .tx_af = GPIO_AF7,
130  .bus = APB1,
131  .irqn = USART3_IRQn,
132 #ifdef MODULE_PERIPH_UART_HW_FC
133  .cts_pin = GPIO_UNDEF,
134  .rts_pin = GPIO_UNDEF,
135  .cts_af = GPIO_AF7,
136  .rts_af = GPIO_AF7,
137 #endif
138 #ifdef MODULE_PERIPH_DMA
139  .dma = DMA_STREAM_UNDEF,
140  .dma_chan = UINT8_MAX,
141 #endif
142  },
143 };
144 
145 #define UART_0_ISR (isr_usart1)
146 #define UART_1_ISR (isr_usart2)
147 #define UART_2_ISR (isr_usart6)
148 #define UART_3_ISR (isr_usart3)
149 
150 #define UART_NUMOF ARRAY_SIZE(uart_config)
151 
157 static const spi_conf_t spi_config[] = {
158  {
159  .dev = SPI4,
160  .mosi_pin = GPIO_PIN(PORT_E, 6),
161  .miso_pin = GPIO_PIN(PORT_E, 5),
162  .sclk_pin = GPIO_PIN(PORT_E, 2),
163  .cs_pin = GPIO_PIN(PORT_E, 11),
164  .mosi_af = GPIO_AF5,
165  .miso_af = GPIO_AF5,
166  .sclk_af = GPIO_AF5,
167  .cs_af = GPIO_AF5,
168  .rccmask = RCC_APB2ENR_SPI4EN,
169  .apbbus = APB2,
170 #ifdef MODULE_PERIPH_DMA
171  .tx_dma = 0,
172  .tx_dma_chan = 4,
173  .rx_dma = 1,
174  .rx_dma_chan = 4,
175 #endif
176  },
177 };
178 
179 #define SPI_NUMOF ARRAY_SIZE(spi_config)
180 
186 static const i2c_conf_t i2c_config[] = {
187  {
188  .dev = I2C1,
189  .speed = I2C_SPEED_NORMAL,
190  .scl_pin = GPIO_PIN(PORT_B, 6),
191  .sda_pin = GPIO_PIN(PORT_B, 7),
192  .scl_af = GPIO_AF4,
193  .sda_af = GPIO_AF4,
194  .bus = APB1,
195  .rcc_mask = RCC_APB1ENR_I2C1EN,
196  .clk = CLOCK_APB1,
197  .irqn = I2C1_EV_IRQn
198  },
199  {
200  .dev = I2C3,
201  .speed = I2C_SPEED_NORMAL,
202  .scl_pin = GPIO_PIN(PORT_A, 8),
203  .sda_pin = GPIO_PIN(PORT_C, 9),
204  .scl_af = GPIO_AF4,
205  .sda_af = GPIO_AF4,
206  .bus = APB1,
207  .rcc_mask = RCC_APB1ENR_I2C3EN,
208  .clk = CLOCK_APB1,
209  .irqn = I2C3_EV_IRQn
210  }
211 };
212 
213 #define I2C_0_ISR isr_i2c1_ev
214 #define I2C_1_ISR isr_i2c3_ev
215 
216 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
217 
229 static const adc_conf_t adc_config[] = {
230  {GPIO_PIN(PORT_A, 3), 0, 3},
231  {GPIO_PIN(PORT_C, 0), 0, 10},
232  {GPIO_PIN(PORT_C, 3), 0, 4},
233  {GPIO_PIN(PORT_A, 4), 0, 14},
234  {GPIO_PIN(PORT_B, 7), 0, 7},
235  {GPIO_PIN(PORT_B, 6), 0, 6},
236 };
237 
238 #define ADC_NUMOF ARRAY_SIZE(adc_config)
239 
241 #ifdef __cplusplus
242 }
243 #endif
244 
245 #endif /* PERIPH_CONF_H */
246 
GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
PORT_E
@ PORT_E
port E
Definition: periph_cpu.h:40
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
PORT_C
@ PORT_C
port C
Definition: periph_cpu.h:38
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
PORT_D
@ PORT_D
port D
Definition: periph_cpu.h:39
dma_conf_t::stream
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: periph_cpu.h:443
cfg_timer_tim5.h
Common configuration for STM32 Timer peripheral based on TIM5.
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
adc_conf_t
ADC device configuration.
Definition: periph_cpu.h:74
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
dma_conf_t
DMA configuration.
Definition: periph_cpu.h:420
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176