periph_conf.h
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1 /*
2  * Copyright (C) 2017 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* Add specific clock configuration (HSE, LSE) for this board here */
23 #ifndef CONFIG_BOARD_HAS_LSE
24 #define CONFIG_BOARD_HAS_LSE 1
25 #endif
26 
27 #include "periph_cpu.h"
28 #include "clk_conf.h"
29 #include "cfg_rtt_default.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
39 static const dma_conf_t dma_config[] = {
40  { .stream = 1 }, /* DMA1 Channel 2 - SPI1_RX */
41  { .stream = 2 }, /* DMA1 Channel 3 - SPI1_TX */
42  { .stream = 3 }, /* DMA1 Channel 4 - USART1_TX */
43  { .stream = 10 }, /* DMA2 Channel 3 - UART4_TX */
44 };
45 
46 #define DMA_0_ISR isr_dma1_channel2
47 #define DMA_1_ISR isr_dma1_channel3
48 #define DMA_2_ISR isr_dma1_channel4
49 #define DMA_3_ISR isr_dma2_channel3
50 
51 #define DMA_NUMOF ARRAY_SIZE(dma_config)
52 
58 static const timer_conf_t timer_config[] = {
59  {
60  .dev = TIM5,
61  .max = 0xffffffff,
62  .rcc_mask = RCC_APB1ENR1_TIM5EN,
63  .bus = APB1,
64  .irqn = TIM5_IRQn
65  }
66 };
67 
68 #define TIMER_0_ISR isr_tim5
69 
70 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
71 
77 static const uart_conf_t uart_config[] = {
78  {
79  .dev = USART1,
80  .rcc_mask = RCC_APB2ENR_USART1EN,
81  .rx_pin = GPIO_PIN(PORT_B, 7),
82  .tx_pin = GPIO_PIN(PORT_B, 6),
83  .rx_af = GPIO_AF7,
84  .tx_af = GPIO_AF7,
85  .bus = APB2,
86  .irqn = USART1_IRQn,
87  .type = STM32_USART,
88  .clk_src = 0, /* Use APB clock */
89 #ifdef MODULE_PERIPH_DMA
90  .dma = 2,
91  .dma_chan = 2
92 #endif
93  },
94  {
95  .dev = UART4,
96  .rcc_mask = RCC_APB1ENR1_UART4EN,
97  .rx_pin = GPIO_PIN(PORT_A, 1),
98  .tx_pin = GPIO_PIN(PORT_A, 0),
99  .rx_af = GPIO_AF8,
100  .tx_af = GPIO_AF8,
101  .bus = APB1,
102  .irqn = UART4_IRQn,
103  .type = STM32_USART,
104  .clk_src = 0, /* Use APB clock */
105 #ifdef MODULE_PERIPH_DMA
106  .dma = 3,
107  .dma_chan = 2
108 #endif
109  }
110 };
111 
112 #define UART_0_ISR (isr_usart1)
113 #define UART_1_ISR (isr_uart4)
114 
115 #define UART_NUMOF ARRAY_SIZE(uart_config)
116 
122 static const pwm_conf_t pwm_config[] = {
123  {
124  .dev = TIM2,
125  .rcc_mask = RCC_APB1ENR1_TIM2EN,
126  .chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0}, /* D9 */
127  { .pin = GPIO_UNDEF, .cc_chan = 0},
128  { .pin = GPIO_UNDEF, .cc_chan = 0},
129  { .pin = GPIO_UNDEF, .cc_chan = 0} },
130  .af = GPIO_AF1,
131  .bus = APB1
132  }
133 };
134 
135 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
136 
142 static const spi_conf_t spi_config[] = {
143  {
144  .dev = SPI1,
145  .mosi_pin = GPIO_PIN(PORT_A, 7),
146  .miso_pin = GPIO_PIN(PORT_A, 6),
147  .sclk_pin = GPIO_PIN(PORT_A, 5),
148  .cs_pin = GPIO_UNDEF,
149  .mosi_af = GPIO_AF5,
150  .miso_af = GPIO_AF5,
151  .sclk_af = GPIO_AF5,
152  .cs_af = GPIO_AF5,
153  .rccmask = RCC_APB2ENR_SPI1EN,
154  .apbbus = APB2,
155 #ifdef MODULE_PERIPH_DMA
156  .tx_dma = 1,
157  .tx_dma_chan = 1,
158  .rx_dma = 0,
159  .rx_dma_chan = 1,
160 #endif
161  }
162 };
163 
164 #define SPI_NUMOF ARRAY_SIZE(spi_config)
165 
171 static const i2c_conf_t i2c_config[] = {
172  {
173  .dev = I2C1,
174  .speed = I2C_SPEED_NORMAL,
175  .scl_pin = GPIO_PIN(PORT_B, 8),
176  .sda_pin = GPIO_PIN(PORT_B, 9),
177  .scl_af = GPIO_AF4,
178  .sda_af = GPIO_AF4,
179  .bus = APB1,
180  .rcc_mask = RCC_APB1ENR1_I2C1EN,
181  .irqn = I2C1_ER_IRQn,
182  },
183  {
184  .dev = I2C2,
185  .speed = I2C_SPEED_NORMAL,
186  .scl_pin = GPIO_PIN(PORT_B, 10),
187  .sda_pin = GPIO_PIN(PORT_B, 11),
188  .scl_af = GPIO_AF4,
189  .sda_af = GPIO_AF4,
190  .bus = APB1,
191  .rcc_mask = RCC_APB1ENR1_I2C2EN,
192  .irqn = I2C2_ER_IRQn,
193  },
194 };
195 
196 #define I2C_0_ISR isr_i2c1_er
197 #define I2C_1_ISR isr_i2c2_er
198 
199 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
200 
202 #ifdef __cplusplus
203 }
204 #endif
205 
206 #endif /* PERIPH_CONF_H */
207 
GPIO_AF8
@ GPIO_AF8
use alternate function 8
Definition: periph_cpu_common.h:94
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
pwm_conf_t::dev
mini_timer_t * dev
Timer used.
Definition: periph_cpu_common.h:154
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
dma_conf_t::stream
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: periph_cpu.h:443
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
STM32_USART
@ STM32_USART
STM32 USART module type.
Definition: periph_cpu.h:583
GPIO_AF1
@ GPIO_AF1
use alternate function 1
Definition: periph_cpu_common.h:87
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
dma_conf_t
DMA configuration.
Definition: periph_cpu.h:420
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176