periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 /* This board provides an HSE */
23 #ifndef CONFIG_BOARD_HAS_HSE
24 #define CONFIG_BOARD_HAS_HSE 1
25 #endif
26 
27 /* The HSE provides a 16MHz clock */
28 #define CLOCK_HSE MHZ(16)
29 
30 #include "periph_cpu.h"
31 #include "clk_conf.h"
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
41 static const dma_conf_t dma_config[] = {
42  { .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
43  { .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
44 };
45 
46 #define DMA_0_ISR isr_dma2_stream3
47 #define DMA_1_ISR isr_dma2_stream2
48 
49 #define DMA_NUMOF ARRAY_SIZE(dma_config)
50 
56 static const timer_conf_t timer_config[] = {
57  {
58  .dev = TIM2,
59  .max = 0xffffffff,
60  .rcc_mask = RCC_APB1ENR_TIM2EN,
61  .bus = APB1,
62  .irqn = TIM2_IRQn
63  },
64  {
65  .dev = TIM5,
66  .max = 0xffffffff,
67  .rcc_mask = RCC_APB1ENR_TIM5EN,
68  .bus = APB1,
69  .irqn = TIM5_IRQn
70  }
71 };
72 
73 #define TIMER_0_ISR isr_tim2
74 #define TIMER_1_ISR isr_tim5
75 
76 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
77 
83 static const pwm_conf_t pwm_config[] = {
84  {
85  .dev = TIM11,
86  .rcc_mask = RCC_APB2ENR_TIM11EN,
87  .chan = { { .pin = GPIO_PIN(PORT_B, 9), .cc_chan = 0 },
88  { .pin = GPIO_UNDEF, .cc_chan = 0 },
89  { .pin = GPIO_UNDEF, .cc_chan = 0 },
90  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
91  .af = GPIO_AF3,
92  .bus = APB2
93  }
94 };
95 
96 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
97 
106 static const adc_conf_t adc_config[] = {
107  {GPIO_PIN(PORT_B, 0), 0, 8},
108  {GPIO_PIN(PORT_B, 1), 0, 9}
109 };
110 
111 #define ADC_NUMOF ARRAY_SIZE(adc_config)
112 
118 static const dac_conf_t dac_config[] = {
119  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
120  { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
121 };
122 
123 #define DAC_NUMOF ARRAY_SIZE(dac_config)
124 
130 static const uart_conf_t uart_config[] = {
131  {
132  .dev = USART2,
133  .rcc_mask = RCC_APB1ENR_USART2EN,
134  .rx_pin = GPIO_PIN(PORT_A, 3),
135  .tx_pin = GPIO_PIN(PORT_A, 2),
136  .rx_af = GPIO_AF7,
137  .tx_af = GPIO_AF7,
138  .bus = APB1,
139  .irqn = USART2_IRQn,
140 #ifdef MODULE_PERIPH_DMA
141  .dma = DMA_STREAM_UNDEF,
142  .dma_chan = UINT8_MAX,
143 #endif
144  },
145  {
146  .dev = USART1,
147  .rcc_mask = RCC_APB2ENR_USART1EN,
148  .rx_pin = GPIO_PIN(PORT_A, 10),
149  .tx_pin = GPIO_PIN(PORT_A, 9),
150  .rx_af = GPIO_AF7,
151  .tx_af = GPIO_AF7,
152  .bus = APB2,
153  .irqn = USART1_IRQn,
154 #ifdef MODULE_PERIPH_DMA
155  .dma = DMA_STREAM_UNDEF,
156  .dma_chan = UINT8_MAX,
157 #endif
158  },
159  {
160  .dev = USART3,
161  .rcc_mask = RCC_APB1ENR_USART3EN,
162  .rx_pin = GPIO_PIN(PORT_D, 9),
163  .tx_pin = GPIO_PIN(PORT_D, 8),
164  .rx_af = GPIO_AF7,
165  .tx_af = GPIO_AF7,
166  .bus = APB1,
167  .irqn = USART3_IRQn,
168 #ifdef MODULE_PERIPH_DMA
169  .dma = DMA_STREAM_UNDEF,
170  .dma_chan = UINT8_MAX,
171 #endif
172  },
173 };
174 
175 /* assign ISR vector names */
176 #define UART_0_ISR (isr_usart2)
177 #define UART_1_ISR (isr_usart1)
178 #define UART_2_ISR (isr_usart3)
179 
180 /* deduct number of defined UART interfaces */
181 #define UART_NUMOF ARRAY_SIZE(uart_config)
182 
188 static const spi_conf_t spi_config[] = {
189  {
190  .dev = SPI1,
191  .mosi_pin = GPIO_PIN(PORT_A, 7),
192  .miso_pin = GPIO_PIN(PORT_A, 6),
193  .sclk_pin = GPIO_PIN(PORT_A, 5),
194  .cs_pin = GPIO_PIN(PORT_A, 4),
195  .mosi_af = GPIO_AF5,
196  .miso_af = GPIO_AF5,
197  .sclk_af = GPIO_AF5,
198  .cs_af = GPIO_AF5,
199  .rccmask = RCC_APB2ENR_SPI1EN,
200  .apbbus = APB2,
201 #ifdef MODULE_PERIPH_DMA
202  .tx_dma = 0,
203  .tx_dma_chan = 3,
204  .rx_dma = 1,
205  .rx_dma_chan = 3,
206 #endif
207  }
208 };
209 
210 #define SPI_NUMOF ARRAY_SIZE(spi_config)
211 
217 static const i2c_conf_t i2c_config[] = {
218  {
219  .dev = I2C1,
220  .speed = I2C_SPEED_NORMAL,
221  .scl_pin = GPIO_PIN(PORT_B, 6),
222  .sda_pin = GPIO_PIN(PORT_B, 7),
223  .scl_af = GPIO_AF4,
224  .sda_af = GPIO_AF4,
225  .bus = APB1,
226  .rcc_mask = RCC_APB1ENR_I2C1EN,
227  .clk = CLOCK_APB1,
228  .irqn = I2C1_EV_IRQn
229  }
230 };
231 
232 #define I2C_0_ISR isr_i2c1_ev
233 
234 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
235 
237 #ifdef __cplusplus
238 }
239 #endif
240 
241 #endif /* PERIPH_CONF_H */
242 
GPIO_AF4
@ GPIO_AF4
use alternate function 4
Definition: periph_cpu_common.h:90
dac_conf_t::pin
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:519
pwm_conf_t::dev
mini_timer_t * dev
Timer used.
Definition: periph_cpu_common.h:154
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
GPIO_AF5
@ GPIO_AF5
use alternate function 5
Definition: periph_cpu_common.h:91
PORT_A
@ PORT_A
port A
Definition: periph_cpu.h:36
PORT_D
@ PORT_D
port D
Definition: periph_cpu.h:39
dma_conf_t::stream
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: periph_cpu.h:443
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
dac_conf_t
DAC line configuration data.
Definition: periph_cpu.h:518
GPIO_AF3
@ GPIO_AF3
use alternate function 3
Definition: periph_cpu_common.h:89
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
timer_conf_t
Timer configuration.
Definition: periph_cpu.h:288
GPIO_AF7
@ GPIO_AF7
use alternate function 7
Definition: periph_cpu_common.h:93
adc_conf_t
ADC device configuration.
Definition: periph_cpu.h:74
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
APB2
@ APB2
APB2 bus.
Definition: periph_cpu.h:177
dma_conf_t
DMA configuration.
Definition: periph_cpu.h:420
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
timer_conf_t::dev
uint32_t dev
Address of timer base.
Definition: periph_cpu.h:112
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:37
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
APB1
@ APB1
APB1 bus.
Definition: periph_cpu.h:176