periph_conf.h
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1 /*
2  * Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
3  * Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
66 #define CLOCK_USE_PLL (1)
67 #define CLOCK_USE_XOSC32_DFLL (0)
68 /*
69  * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
70  * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
71  *
72  * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
73  * be of by a couple off % points, so prefer XOSC32K as default configuration.
74  */
75 #define GEN2_ULP32K (0)
76 
77 #if CLOCK_USE_PLL
78 /* edit these values to adjust the PLL output frequency */
79 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
80 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
81 /* generate the actual used core clock frequency */
82 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
83 #elif CLOCK_USE_XOSC32_DFLL
84 /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
85 #define CLOCK_CORECLOCK (48000000U)
86 #define CLOCK_XOSC32K (32768UL)
87 #define CLOCK_8MHZ (1)
88 #else
89 /* edit this value to your needs */
90 #define CLOCK_DIV (1U)
91 /* generate the actual core clock frequency */
92 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
93 #endif
94 
100 static const tc32_conf_t timer_config[] = {
101  { /* Timer 0 - System Clock */
102  .dev = TC3,
103  .irq = TC3_IRQn,
104  .pm_mask = PM_APBCMASK_TC3,
105  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
106 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
107  .gclk_src = SAM0_GCLK_1MHZ,
108 #else
109  .gclk_src = SAM0_GCLK_MAIN,
110 #endif
111  .flags = TC_CTRLA_MODE_COUNT16,
112  },
113  { /* Timer 1 */
114  .dev = TC4,
115  .irq = TC4_IRQn,
116  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
117  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
118 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
119  .gclk_src = SAM0_GCLK_1MHZ,
120 #else
121  .gclk_src = SAM0_GCLK_MAIN,
122 #endif
123  .flags = TC_CTRLA_MODE_COUNT32,
124  }
125 };
126 
127 #define TIMER_0_MAX_VALUE 0xffff
128 
129 /* interrupt function name mapping */
130 #define TIMER_0_ISR isr_tc3
131 #define TIMER_1_ISR isr_tc4
132 
133 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
134 
140 static const uart_conf_t uart_config[] = {
141  { /* Virtual COM Port */
142  .dev = &SERCOM3->USART,
143  .rx_pin = GPIO_PIN(PA,23),
144  .tx_pin = GPIO_PIN(PA,22),
145 #ifdef MODULE_PERIPH_UART_HW_FC
146  .rts_pin = GPIO_UNDEF,
147  .cts_pin = GPIO_UNDEF,
148 #endif
149  .mux = GPIO_MUX_C,
150  .rx_pad = UART_PAD_RX_1,
151  .tx_pad = UART_PAD_TX_0,
152  .flags = UART_FLAG_NONE,
153  .gclk_src = SAM0_GCLK_MAIN,
154  },
155  { /* EXT1 */
156  .dev = &SERCOM4->USART,
157  .rx_pin = GPIO_PIN(PB,9),
158  .tx_pin = GPIO_PIN(PB,8),
159 #ifdef MODULE_PERIPH_UART_HW_FC
160  .rts_pin = GPIO_UNDEF,
161  .cts_pin = GPIO_UNDEF,
162 #endif
163  .mux = GPIO_MUX_D,
164  .rx_pad = UART_PAD_RX_1,
165  .tx_pad = UART_PAD_TX_0,
166  .flags = UART_FLAG_NONE,
167  .gclk_src = SAM0_GCLK_MAIN,
168  },
169  { /* EXT2/3 */
170  .dev = &SERCOM4->USART,
171  .rx_pin = GPIO_PIN(PB,11),
172  .tx_pin = GPIO_PIN(PB,10),
173 #ifdef MODULE_PERIPH_UART_HW_FC
174  .rts_pin = GPIO_UNDEF,
175  .cts_pin = GPIO_UNDEF,
176 #endif
177  .mux = GPIO_MUX_D,
178  .rx_pad = UART_PAD_RX_3,
179  .tx_pad = UART_PAD_TX_2,
180  .flags = UART_FLAG_NONE,
181  .gclk_src = SAM0_GCLK_MAIN,
182  }
183 };
184 
185 /* interrupt function name mapping */
186 #define UART_0_ISR isr_sercom3
187 #define UART_1_ISR isr_sercom4
188 #define UART_2_ISR isr_sercom5
189 
190 #define UART_NUMOF ARRAY_SIZE(uart_config)
191 
197 #define PWM_0_EN 1
198 #define PWM_1_EN 0
199 #define PWM_2_EN 0
200 
201 #if PWM_0_EN
202 /* PWM0 channels */
203 static const pwm_conf_chan_t pwm_chan0_config[] = {
204  /* GPIO pin, MUX value, TCC channel */
205  { GPIO_PIN(PA, 12), GPIO_MUX_E, 0 },
206  { GPIO_PIN(PA, 13), GPIO_MUX_E, 1 },
207 };
208 #endif
209 #if PWM_1_EN
210 /* PWM1 channels */
211 static const pwm_conf_chan_t pwm_chan1_config[] = {
212  /* GPIO pin, MUX value, TCC channel */
213  { GPIO_PIN(PB, 12), GPIO_MUX_E, 0 },
214  { GPIO_PIN(PB, 13), GPIO_MUX_E, 1 },
215 };
216 #endif
217 #if PWM_2_EN
218 /* PWM2 channels */
219 static const pwm_conf_chan_t pwm_chan2_config[] = {
220  /* GPIO pin, MUX value, TCC channel */
221  { GPIO_PIN(PB, 02), GPIO_MUX_E, 0 },
222  { GPIO_PIN(PB, 03), GPIO_MUX_E, 1 },
223 };
224 #endif
225 
226 /* PWM device configuration */
227 static const pwm_conf_t pwm_config[] = {
228 #if PWM_0_EN
229  {TCC_CONFIG(TCC2), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
230 #endif
231 #if PWM_1_EN
232  {TCC_CONFIG(TC4), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
233 #endif
234 #if PWM_2_EN
235  {TCC_CONFIG(TC6), pwm_chan2_config, ARRAY_SIZE(pwm_chan2_config), SAM0_GCLK_MAIN},
236 #endif
237 };
238 
239 /* number of devices that are actually defined */
240 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
241 
247 static const spi_conf_t spi_config[] = {
248  { /* EXT1 */
249  .dev = &SERCOM0->SPI,
250  .miso_pin = GPIO_PIN(PA, 4),
251  .mosi_pin = GPIO_PIN(PA, 6),
252  .clk_pin = GPIO_PIN(PA, 7),
253  .miso_mux = GPIO_MUX_D,
254  .mosi_mux = GPIO_MUX_D,
255  .clk_mux = GPIO_MUX_D,
256  .miso_pad = SPI_PAD_MISO_0,
257  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
258  .gclk_src = SAM0_GCLK_MAIN,
259 #ifdef MODULE_PERIPH_DMA
260  .tx_trigger = SERCOM0_DMAC_ID_TX,
261  .rx_trigger = SERCOM0_DMAC_ID_RX,
262 #endif
263  },
264  { /* EXT2 */
265  .dev = &SERCOM1->SPI,
266  .miso_pin = GPIO_PIN(PA, 16),
267  .mosi_pin = GPIO_PIN(PA, 18),
268  .clk_pin = GPIO_PIN(PA, 19),
269  .miso_mux = GPIO_MUX_C,
270  .mosi_mux = GPIO_MUX_C,
271  .clk_mux = GPIO_MUX_C,
272  .miso_pad = SPI_PAD_MISO_0,
273  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
274  .gclk_src = SAM0_GCLK_MAIN,
275 #ifdef MODULE_PERIPH_DMA
276  .tx_trigger = SERCOM1_DMAC_ID_TX,
277  .rx_trigger = SERCOM1_DMAC_ID_RX,
278 #endif
279  },
280  { /* EXT3 */
281  .dev = &SERCOM5->SPI,
282  .miso_pin = GPIO_PIN(PB, 16),
283  .mosi_pin = GPIO_PIN(PB, 22),
284  .clk_pin = GPIO_PIN(PB, 23),
285  .miso_mux = GPIO_MUX_C,
286  .mosi_mux = GPIO_MUX_D,
287  .clk_mux = GPIO_MUX_D,
288  .miso_pad = SPI_PAD_MISO_0,
289  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
290  .gclk_src = SAM0_GCLK_MAIN,
291 #ifdef MODULE_PERIPH_DMA
292  .tx_trigger = SERCOM5_DMAC_ID_TX,
293  .rx_trigger = SERCOM5_DMAC_ID_RX,
294 #endif
295  }
296 };
297 
298 #define SPI_NUMOF ARRAY_SIZE(spi_config)
299 
305 static const i2c_conf_t i2c_config[] = {
306  {
307  .dev = &(SERCOM2->I2CM),
308  .speed = I2C_SPEED_NORMAL,
309  .scl_pin = GPIO_PIN(PA, 9),
310  .sda_pin = GPIO_PIN(PA, 8),
311  .mux = GPIO_MUX_D,
312  .gclk_src = SAM0_GCLK_MAIN,
313  .flags = I2C_FLAG_NONE
314  }
315 };
316 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
317 
323 #ifndef RTT_FREQUENCY
324 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
325 #endif
326 
333 /* ADC Default values */
334 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
335 
336 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
337 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
338 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
339 
340 static const adc_conf_chan_t adc_channels[] = {
341  /* port, pin, muxpos */
342  {GPIO_PIN(PB, 0), ADC_INPUTCTRL_MUXPOS_PIN8}, /* EXT1, pin 3 */
343  {GPIO_PIN(PB, 1), ADC_INPUTCTRL_MUXPOS_PIN9}, /* EXT1, pin 4 */
344  {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS_PIN18}, /* EXT2, pin 3 */
345  {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS_PIN19}, /* EXT2, pin 4 */
346  {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0}, /* EXT3, pin 3 */
347  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS_PIN1} /* EXT3, pin 4. This is
348  disconnected by default. PA3 is connected to USB_ID.
349  Move PA03 SELECT jumper to EXT3 to connect. */
350 };
351 
352 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
353 
359 #define DAC_CLOCK SAM0_GCLK_1MHZ
360  /* use Vcc as reference voltage */
361 #define DAC_VREF DAC_CTRLB_REFSEL_AVCC
362 
364 #ifdef __cplusplus
365 }
366 #endif
367 
368 #endif /* PERIPH_CONF_H */
369 
UART_PAD_RX_3
@ UART_PAD_RX_3
select pad 3
Definition: periph_cpu_common.h:154
SAM0_GCLK_MAIN
@ SAM0_GCLK_MAIN
48 MHz main clock
Definition: periph_cpu.h:59
GPIO_MUX_E
@ GPIO_MUX_E
select peripheral function E
Definition: periph_cpu_common.h:140
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
UART_PAD_TX_0
@ UART_PAD_TX_0
select pad 0
Definition: periph_cpu_common.h:161
I2C_FLAG_NONE
@ I2C_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:407
UART_FLAG_NONE
@ UART_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:171
PB
@ PB
port B
Definition: periph_cpu_common.h:89
ARRAY_SIZE
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: kernel_defines.h:122
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
UART_PAD_RX_1
@ UART_PAD_RX_1
select pad 1
Definition: periph_cpu_common.h:152
SPI_PAD_MISO_0
@ SPI_PAD_MISO_0
use pad 0 for MISO line
Definition: periph_cpu_common.h:327
pwm_conf_chan_t
PWM channel configuration data structure.
Definition: periph_cpu_common.h:307
UART_PAD_TX_2
@ UART_PAD_TX_2
select pad 2
Definition: periph_cpu_common.h:162
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
adc_channels
static const gpio_t adc_channels[]
Static array with declared ADC channels.
Definition: periph_conf_common.h:53
tc32_conf_t::dev
Tc * dev
pointer to the used Timer device
Definition: periph_cpu_common.h:462
GPIO_MUX_C
@ GPIO_MUX_C
select peripheral function C
Definition: periph_cpu_common.h:138
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
SPI_PAD_MOSI_2_SCK_3
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
Definition: periph_cpu_common.h:338
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
adc_conf_chan_t
ADC Channel Configuration.
Definition: periph_cpu_common.h:765
tc32_conf_t
Timer device configuration.
Definition: periph_cpu_common.h:461
GPIO_MUX_D
@ GPIO_MUX_D
select peripheral function D
Definition: periph_cpu_common.h:139
PA
@ PA
port A
Definition: periph_cpu_common.h:88
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
SAM0_GCLK_1MHZ
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:60
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
TCC_CONFIG
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
Definition: periph_cpu_common.h:297
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247