periph_conf.h
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1 /*
2  * Copyright (C) 2019 ML!PA Consulting GmbH
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
35 #ifndef USE_XOSC_ONLY
36 #define USE_XOSC_ONLY (0)
37 #endif
38 
43 #define XOSC1_FREQUENCY MHZ(12)
44 
50 #ifndef CLOCK_CORECLOCK
51 #if USE_XOSC_ONLY
52 #define CLOCK_CORECLOCK XOSC1_FREQUENCY
53 #else
54 #define CLOCK_CORECLOCK MHZ(120)
55 #endif
56 #endif
57 
63 #define EXTERNAL_OSC32_SOURCE 1
64 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
65 
71 #define USE_VREG_BUCK (1)
72 
77 static const tc32_conf_t timer_config[] = {
78  { /* Timer 0 - System Clock */
79  .dev = TC0,
80  .irq = TC0_IRQn,
81  .mclk = &MCLK->APBAMASK.reg,
82  .mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
83  .gclk_id = TC0_GCLK_ID,
84  .gclk_src = SAM0_GCLK_TIMER,
85  .flags = TC_CTRLA_MODE_COUNT32,
86  },
87  { /* Timer 1 */
88  .dev = TC2,
89  .irq = TC2_IRQn,
90  .mclk = &MCLK->APBBMASK.reg,
91  .mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
92  .gclk_id = TC2_GCLK_ID,
93  .gclk_src = SAM0_GCLK_TIMER,
94  .flags = TC_CTRLA_MODE_COUNT32,
95  }
96 };
97 
98 /* Timer 0 configuration */
99 #define TIMER_0_CHANNELS 2
100 #define TIMER_0_ISR isr_tc0
101 
102 /* Timer 1 configuration */
103 #define TIMER_1_CHANNELS 2
104 #define TIMER_1_ISR isr_tc2
105 
106 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
107 
113 static const uart_conf_t uart_config[] = {
114  { /* Virtual COM Port */
115  .dev = &SERCOM2->USART,
116  .rx_pin = GPIO_PIN(PB, 24),
117  .tx_pin = GPIO_PIN(PB, 25),
118 #ifdef MODULE_PERIPH_UART_HW_FC
119  .rts_pin = GPIO_UNDEF,
120  .cts_pin = GPIO_UNDEF,
121 #endif
122  .mux = GPIO_MUX_D,
123  .rx_pad = UART_PAD_RX_1,
124  .tx_pad = UART_PAD_TX_0,
125  .flags = UART_FLAG_NONE,
126  .gclk_src = SAM0_GCLK_PERIPH,
127  },
128  { /* EXT1 */
129  .dev = &SERCOM0->USART,
130  .rx_pin = GPIO_PIN(PA, 5),
131  .tx_pin = GPIO_PIN(PA, 4),
132 #ifdef MODULE_PERIPH_UART_HW_FC
133  .rts_pin = GPIO_UNDEF,
134  .cts_pin = GPIO_UNDEF,
135 #endif
136  .mux = GPIO_MUX_D,
137  .rx_pad = UART_PAD_RX_1,
138  .tx_pad = UART_PAD_TX_0,
139  .flags = UART_FLAG_NONE,
140  .gclk_src = SAM0_GCLK_PERIPH,
141  },
142  { /* EXT2 */
143  .dev = &SERCOM5->USART,
144  .rx_pin = GPIO_PIN(PB, 17),
145  .tx_pin = GPIO_PIN(PB, 16),
146 #ifdef MODULE_PERIPH_UART_HW_FC
147  .rts_pin = GPIO_UNDEF,
148  .cts_pin = GPIO_UNDEF,
149 #endif
150  .mux = GPIO_MUX_C,
151  .rx_pad = UART_PAD_RX_1,
152  .tx_pad = UART_PAD_TX_0,
153  .flags = UART_FLAG_NONE,
154  .gclk_src = SAM0_GCLK_PERIPH,
155  },
156  { /* EXT3 */
157  .dev = &SERCOM1->USART,
158  .rx_pin = GPIO_PIN(PC, 23),
159  .tx_pin = GPIO_PIN(PC, 22),
160 #ifdef MODULE_PERIPH_UART_HW_FC
161  .rts_pin = GPIO_UNDEF,
162  .cts_pin = GPIO_UNDEF,
163 #endif
164  .mux = GPIO_MUX_C,
165  .rx_pad = UART_PAD_RX_1,
166  .tx_pad = UART_PAD_TX_0,
167  .flags = UART_FLAG_NONE,
168  .gclk_src = SAM0_GCLK_PERIPH,
169  }
170 };
171 
172 /* interrupt function name mapping */
173 #define UART_0_ISR isr_sercom2_2
174 #define UART_0_ISR_TX isr_sercom2_0
175 
176 #define UART_1_ISR isr_sercom0_2
177 #define UART_1_ISR_TX isr_sercom0_0
178 
179 #define UART_2_ISR isr_sercom5_2
180 #define UART_2_ISR_TX isr_sercom5_0
181 
182 #define UART_3_ISR isr_sercom1_2
183 #define UART_3_ISR_TX isr_sercom1_0
184 
185 #define UART_NUMOF ARRAY_SIZE(uart_config)
186 
192 #define PWM_0_EN 1
193 
194 #if PWM_0_EN
195 /* PWM0 channels */
196 static const pwm_conf_chan_t pwm_chan0_config[] = {
197  /* GPIO pin, MUX value, TCC channel */
198  { GPIO_PIN(PC, 18), GPIO_MUX_F, 2 },
199 };
200 #endif
201 
202 /* PWM device configuration */
203 static const pwm_conf_t pwm_config[] = {
204 #if PWM_0_EN
205  { .tim = TCC_CONFIG(TCC0),
206  .chan = pwm_chan0_config,
207  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
208  .gclk_src = SAM0_GCLK_48MHZ,
209  },
210 #endif
211 };
212 
213 /* number of devices that are actually defined */
214 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
215 
221 static const spi_conf_t spi_config[] = {
222  { /* EXT1 */
223  .dev = &(SERCOM4->SPI),
224  .miso_pin = GPIO_PIN(PB, 29),
225  .mosi_pin = GPIO_PIN(PB, 27),
226  .clk_pin = GPIO_PIN(PB, 26),
227  .miso_mux = GPIO_MUX_D,
228  .mosi_mux = GPIO_MUX_D,
229  .clk_mux = GPIO_MUX_D,
230  .miso_pad = SPI_PAD_MISO_3,
231  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
232  .gclk_src = SAM0_GCLK_PERIPH,
233 #ifdef MODULE_PERIPH_DMA
234  .tx_trigger = SERCOM4_DMAC_ID_TX,
235  .rx_trigger = SERCOM4_DMAC_ID_RX,
236 #endif
237 
238  },
239  { /* EXT2, EXT3 */
240  .dev = &(SERCOM6->SPI),
241  .miso_pin = GPIO_PIN(PC, 7),
242  .mosi_pin = GPIO_PIN(PC, 4),
243  .clk_pin = GPIO_PIN(PC, 5),
244  .miso_mux = GPIO_MUX_C,
245  .mosi_mux = GPIO_MUX_C,
246  .clk_mux = GPIO_MUX_C,
247  .miso_pad = SPI_PAD_MISO_3,
248  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
249  .gclk_src = SAM0_GCLK_48MHZ,
250 #ifdef MODULE_PERIPH_DMA
251  .tx_trigger = SERCOM6_DMAC_ID_TX,
252  .rx_trigger = SERCOM6_DMAC_ID_RX,
253 #endif
254  }
255 };
256 
257 #define SPI_NUMOF ARRAY_SIZE(spi_config)
258 
264 static const i2c_conf_t i2c_config[] = {
265  { /* EXT1 */
266  .dev = &(SERCOM3->I2CM),
267  .speed = I2C_SPEED_NORMAL,
268  .scl_pin = GPIO_PIN(PA, 23),
269  .sda_pin = GPIO_PIN(PA, 22),
270  .mux = GPIO_MUX_C,
271  .gclk_src = SAM0_GCLK_PERIPH,
272  .flags = I2C_FLAG_NONE
273  },
274  { /* EXT2, EXT3 */
275  .dev = &(SERCOM7->I2CM),
276  .speed = I2C_SPEED_NORMAL,
277  .scl_pin = GPIO_PIN(PD, 9),
278  .sda_pin = GPIO_PIN(PD, 8),
279  .mux = GPIO_MUX_C,
280  .gclk_src = SAM0_GCLK_PERIPH,
281  .flags = I2C_FLAG_NONE
282  }
283 };
284 
285 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
286 
292 #ifndef RTT_FREQUENCY
293 #define RTT_FREQUENCY (32768U)
294 #endif
295 
301 static const sam0_common_usb_config_t sam_usbdev_config[] = {
302  {
303  .dm = GPIO_PIN(PA, 24),
304  .dp = GPIO_PIN(PA, 25),
305  .d_mux = GPIO_MUX_H,
306  .device = &USB->DEVICE,
307  .gclk_src = SAM0_GCLK_PERIPH,
308  }
309 };
317 /* ADC Default values */
318 #define ADC_PRESCALER ADC_CTRLA_PRESCALER_DIV128
319 
320 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
321 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
322 #define ADC_DEV ADC0
323 
324 static const adc_conf_chan_t adc_channels[] = {
325  /* port, pin, muxpos */
326  {GPIO_PIN(PA, 3), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN1)},
327  {GPIO_PIN(PA, 5), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN5)},
328  {GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)}
329 };
330 
331 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
332 
338  /* Must not exceed 12 MHz */
339 #define DAC_CLOCK SAM0_GCLK_TIMER
340  /* Use external reference voltage on PA03 */
341  /* (You have to manually connect PA03 with Vcc) */
342  /* Internal reference only gives 1V */
343 #define DAC_VREF DAC_CTRLB_REFSEL_VREFPU
344 
346 #ifdef __cplusplus
347 }
348 #endif
349 
350 #endif /* PERIPH_CONF_H */
351 
GPIO_MUX_F
@ GPIO_MUX_F
select peripheral function F
Definition: periph_cpu_common.h:141
PD
@ PD
port D
Definition: periph_cpu_common.h:91
I2C_SPEED_NORMAL
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: i2c.h:177
SAM0_GCLK_PERIPH
@ SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
Definition: periph_cpu.h:67
UART_PAD_TX_0
@ UART_PAD_TX_0
select pad 0
Definition: periph_cpu_common.h:161
I2C_FLAG_NONE
@ I2C_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:407
UART_FLAG_NONE
@ UART_FLAG_NONE
No flags set.
Definition: periph_cpu_common.h:171
PB
@ PB
port B
Definition: periph_cpu_common.h:89
SAM0_GCLK_TIMER
@ SAM0_GCLK_TIMER
4-8 MHz clock for xTimer
Definition: periph_cpu.h:66
sam0_common_usb_config_t
USB peripheral parameters.
Definition: periph_cpu_common.h:774
sam0_common_usb_config_t::dm
gpio_t dm
D- line gpio
Definition: periph_cpu_common.h:775
ARRAY_SIZE
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: kernel_defines.h:122
pwm_conf_t
PWM device configuration.
Definition: periph_cpu_common.h:153
UART_PAD_RX_1
@ UART_PAD_RX_1
select pad 1
Definition: periph_cpu_common.h:152
pwm_conf_chan_t
PWM channel configuration data structure.
Definition: periph_cpu_common.h:307
GPIO_UNDEF
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Definition: periph_cpu_common.h:52
uart_conf_t
UART device configuration.
Definition: periph_cpu.h:166
adc_channels
static const gpio_t adc_channels[]
Static array with declared ADC channels.
Definition: periph_conf_common.h:53
tc32_conf_t::dev
Tc * dev
pointer to the used Timer device
Definition: periph_cpu_common.h:462
GPIO_MUX_C
@ GPIO_MUX_C
select peripheral function C
Definition: periph_cpu_common.h:138
SPI_PAD_MOSI_0_SCK_1
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
Definition: periph_cpu_common.h:337
uart_conf_t::dev
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
adc_conf_chan_t
ADC Channel Configuration.
Definition: periph_cpu_common.h:765
tc32_conf_t
Timer device configuration.
Definition: periph_cpu_common.h:461
SPI_PAD_MISO_3
@ SPI_PAD_MISO_3
use pad 0 for MISO line
Definition: periph_cpu_common.h:330
GPIO_MUX_D
@ GPIO_MUX_D
select peripheral function D
Definition: periph_cpu_common.h:139
SAM0_GCLK_48MHZ
@ SAM0_GCLK_48MHZ
48MHz clock
Definition: periph_cpu.h:49
GPIO_MUX_H
@ GPIO_MUX_H
select peripheral function H
Definition: periph_cpu_common.h:143
PC
@ PC
port C
Definition: periph_cpu_common.h:90
PA
@ PA
port A
Definition: periph_cpu_common.h:88
i2c_conf_t
I2C configuration options.
Definition: periph_cpu.h:128
spi_conf_t::dev
SPI_Type * dev
SPI device to use.
Definition: periph_cpu.h:465
TCC_CONFIG
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
Definition: periph_cpu_common.h:297
spi_conf_t
SPI configuration structure type.
Definition: periph_cpu.h:273
i2c_conf_t::dev
I2C_TypeDef * dev
USART device used.
Definition: periph_cpu.h:247
pwm_conf_t::tim
tc_tcc_cfg_t tim
timer configuration
Definition: periph_cpu_common.h:317