23 #include "periph_cpu.h"
36 #define USE_XOSC_ONLY (0)
43 #define XOSC1_FREQUENCY MHZ(12)
50 #ifndef CLOCK_CORECLOCK
52 #define CLOCK_CORECLOCK XOSC1_FREQUENCY
54 #define CLOCK_CORECLOCK MHZ(120)
63 #define EXTERNAL_OSC32_SOURCE 1
64 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
71 #define USE_VREG_BUCK (1)
81 .mclk = &MCLK->APBAMASK.reg,
82 .mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
83 .gclk_id = TC0_GCLK_ID,
85 .flags = TC_CTRLA_MODE_COUNT32,
90 .mclk = &MCLK->APBBMASK.reg,
91 .mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
92 .gclk_id = TC2_GCLK_ID,
94 .flags = TC_CTRLA_MODE_COUNT32,
99 #define TIMER_0_CHANNELS 2
100 #define TIMER_0_ISR isr_tc0
103 #define TIMER_1_CHANNELS 2
104 #define TIMER_1_ISR isr_tc2
106 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
115 .
dev = &SERCOM2->USART,
118 #ifdef MODULE_PERIPH_UART_HW_FC
129 .dev = &SERCOM0->USART,
132 #ifdef MODULE_PERIPH_UART_HW_FC
143 .dev = &SERCOM5->USART,
146 #ifdef MODULE_PERIPH_UART_HW_FC
157 .dev = &SERCOM1->USART,
160 #ifdef MODULE_PERIPH_UART_HW_FC
173 #define UART_0_ISR isr_sercom2_2
174 #define UART_0_ISR_TX isr_sercom2_0
176 #define UART_1_ISR isr_sercom0_2
177 #define UART_1_ISR_TX isr_sercom0_0
179 #define UART_2_ISR isr_sercom5_2
180 #define UART_2_ISR_TX isr_sercom5_0
182 #define UART_3_ISR isr_sercom1_2
183 #define UART_3_ISR_TX isr_sercom1_0
185 #define UART_NUMOF ARRAY_SIZE(uart_config)
206 .chan = pwm_chan0_config,
214 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
223 .
dev = &(SERCOM4->SPI),
233 #ifdef MODULE_PERIPH_DMA
234 .tx_trigger = SERCOM4_DMAC_ID_TX,
235 .rx_trigger = SERCOM4_DMAC_ID_RX,
240 .dev = &(SERCOM6->SPI),
250 #ifdef MODULE_PERIPH_DMA
251 .tx_trigger = SERCOM6_DMAC_ID_TX,
252 .rx_trigger = SERCOM6_DMAC_ID_RX,
257 #define SPI_NUMOF ARRAY_SIZE(spi_config)
266 .
dev = &(SERCOM3->I2CM),
275 .dev = &(SERCOM7->I2CM),
285 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
292 #ifndef RTT_FREQUENCY
293 #define RTT_FREQUENCY (32768U)
306 .device = &USB->DEVICE,
318 #define ADC_PRESCALER ADC_CTRLA_PRESCALER_DIV128
320 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
321 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
326 {
GPIO_PIN(
PA, 3), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN1)},
327 {
GPIO_PIN(
PA, 5), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN5)},
328 {
GPIO_PIN(
PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)}
331 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
339 #define DAC_CLOCK SAM0_GCLK_TIMER
343 #define DAC_VREF DAC_CTRLB_REFSEL_VREFPU